SRAMs may be manufactured as individual semiconductor devices or as an integral part of many microprocessors, system on a chip devices, and other logic devices. In today's microprocessors, a very large amount of embedded SRAM is usually used as cache memory. As with most memories, the demand for larger amounts of memory on a single device continues to grow. However, as transistor gate lengths scale down to 65 nanometers, 45 nanometers, and even smaller, designing SRAM bit cells that are stable for all functional requirements across a product's lifetime has become increasingly difficult.
Process variations, doping fluctuations, Negative Bias Temperature Instability (NBTT), defects, gate oxide defects, operating temperature variations, operating voltage variation, and other phenomena including terrestrial and extraterrestrial radiation may manifest as changes to transistor threshold voltage (VT). Furthermore, minimum operating voltage (Vmin) of the SRAM memory cells may drift as a result of burn-in testing, subsequent operation, or combinations thereof. This change in Vmin may result in a degradation of SRAM memory cells stability over time. These issues make it increasingly difficult to design and fabricate an SRAM memory that is stable for different operational modes such as read operations and write operations.
In order to minimize the impact of these variations on device threshold and memory cell stability, memory designers have designed SRAM memory cells with Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices having channel lengths much longer than the minimum allowed by the technology. The longer channel length results in a smaller variation in VT across process, temperature, and product lifetime. Using longer channel lengths result in a more stable memory cell. However, the memory cell with longer channel lengths is larger than it needs to be based on the lithography requirements for any given process. Even a small change in the size of a memory cell can result in drastic increases to the overall SRAM, which in turn can drastically increase the size of a microprocessor or system on a chip device with embedded SRAM. Larger semiconductor device sizes generally translate into higher costs for the devices.
As a result, there is a need for a memory circuit design and method of making a memory circuit that results in a smaller memory cell that is stable across operational modes, process variations, ambient condition variations, and product lifecycles.